The design process of an integrated circuit includes several steps: topology selection, sizing, and layout. Topology selection is the task of choosing an interconnection of circuit components to implement a desired function. Sizing is the process of choosing parameter values for each of the components in a topology. The process chooses component parameters, for example, the width (W) and the length (L) of a transistor. The component parameters are also referred to as design variables. Typically, a circuit designer defines a range of possible values for each design variable. The set of all combinations of design variable values is known as the design space. A design point is an element of the design space.
To size a circuit, one method uses handcrafted equations and various heuristics to the component parameters of different device sizes. FIG. 1a illustrates a conventional method for sizing an integrated circuit. The sizing method starts by receiving an unsized design. In step 102, the method solves the first-order equations representing the unsized design. In step 104, the method performs rough manual designs. In step 106, simulation is invoked to simulate the design. In step 108, a determination is made whether the outcome of the simulation from step 106 meets the user's design specifications. If the design specifications are not met, the method moves to step 110 where the design is manually adjusted, and the method continues in step 104. If the design specifications are met, a sized design is returned and the method ends.
FIG. 1b illustrates another conventional method for sizing an integrated circuit. In FIG. 1b, circuit synthesis with automatic sizing is used to replace the manual, designer-in-the-loop process of FIG. 1a. The method starts by receiving an unsized design. In step 120, the method handles the operations necessary for setting up the environment for performing an automatic sizing operation. In step 122, the automatic sizing operation is performed and a sized design is generated.
The process of automatic sizing visits and evaluates each design point in a design space, in an attempt to find a design point that satisfies the design specifications. The method for evaluating a design point consists of running simulations, gathering simulation results, and then computing the cost of the design point based on the simulation results. Typically, multiple simulations are required to evaluate each design point. An example of the simulation environment used in the sizing process is the Simulation Program with Integrated Circuit Emphasis (SPICE). The Spectre simulator from Cadence is an example of a commercially available SPICE simulator.
FIG. 1c illustrates an example of a design space with a three-transistor integrated circuit. The circuit includes M1, M2, and M3 as the three transistors of interest. Let x1={1u, 2u, . . . , 100u} and x2={5u, 6u, . . . , 500u}; and let M1.L=M2.L=M3.L=x1, and M1.W=M2.W=M3.W=x2. In this example, there are two independent variables, x1 and x2. A design point is a particular value for x1 and x2. Examples of design points are {1u, 5u}, {10u, 10u}, and {100u, 500u}. The design space is the set of all design points. In this example, {x1, x2}={{1u, 5u}, {1u, 6u} . . . , and {1u, 500u}; {2u, 5u}, {2u, 6u} . . . , and {2u, 500u}; . . . {100u, 5u}, {100u, 6u} . . . , and {100u, 500u}}.
Unlike the simple example in FIG. 1c, design spaces for commercial integrated circuits may contain trillions of design points. It is challenging to effectively explore the entire design space of a complex integrated circuit using exhaustive search methods in evaluating each design point. Finding a design point, in such a large design space, that satisfies the user's design specifications is extremely time consuming. In practice, run times of a few hours to a few days are common, even when multiple computers are used to run evaluations in parallel. Therefore, there is a need for a method that substantially reduces the run time of an integrated circuit sizing operation. In particular, there is a need for an effective search process for finding design points that meet the user's design specifications.